International Conference on IC Design and Technology

Technical Program

Technical Program

Download the ICICDT 2013 Program.

ICICDT 2013 Program

08:30 Welcome and Opening Remarks

Keynote Paper

Thursday, 30/05/2013, 08:45 to 09:30

Room: Aula Volta

Chairman: Marc Belleville, CEA-LETI

08:45 Technology Push or Marketing Pull?

B. Murari

STMicroelectronics

Session A - CAD

Thursday, 30/05/2013, 09:30 to 10:40

Room: Aula Volta

Chairmen: David Pan, University of Texas

Gi-Joon Nam, IBM

A1

09:30 Invited Paper: The FASTER Vision for Designing Dynamically Reconfigurable Systems

D. Sciuto1, M. Santambrogio1, C. Pilato1, D. Pnevmatikatos2, K. Papadimitriou2, D. Stroobandt3

1Polytechnic of Milano, 2Foundation for Research and Technology Hellas, 3Ghent University

A2

09:45 A Efficient Metric of Setup Time for Pulsed Flip-Flops Based on Output Transition Time

S. Bernard1, A. Valentian1, M. Belleville1, D. Bol2, J. Legat2

1CEA-LETI, 2UCL-ICTEAM

A3

09:55 Balanced Stochastic Truncation of Coupled 3D Interconnect

A. Zjajo, N. van der Meijs, R. van Leuken

Delft University of Technology

A4

10:05 Folded Circuit Synthesis: Logic Simplification Using Dual Edge-Triggered Flip-Flops

I. Han, Y. Shin

KAIST

A5

10:15 Invited Paper: Exploration of Different Implementation Styles for Graphene-Based Reconfigurable Gates

S. Miryala, A. Calimera, E. Macii, M. Poncino

Polytechnic of Torino

A6

10:30 Improved Modeling of Isolated EDMOS in Advanced CMOS Technologies

A. Litty1, 2, S. Ortolland1, S. Cristoloveanu2, H. Ros1, D. Golanski1

1STMicroelectronics, 2IMEP-INP

10:40 Coffee Break

Session B - DFM/DFT/DFR/DFY

Thursday, 30/05/2013, 10:55 to 12:00

Room: Aula Volta

Chairman: Rouwaida Kanj, American University of Beirut

B1

10:55 Invited Paper: Evaluating the Accuracy of SRAM Margin Simulation Through Large Scale Monte-Carlo Simulations with Accurate Compact Models

P. Asenov1, C. Millar2, S. Roy3, D. Reid2, D. New1, A. Asenov3

1ARM, 2Gold Standard Simulations, 3University of Glasgow

B2

11:10 Convolution/Deconvolution SRAM Analyses for Complex Gamma Mixtures RTN Distributions

W. Sohma, H. Yamauchi

Fukuoka Institute of Technology

B3

11:20 Invited Paper: Accelerated Reliability Testing of Flash Memory

M. Calabrese1, C. Miccoli2, C. Monzio Compagnoni2, L. Chiavarone1, S. Beltrami1, A. Parisi1, S. Bartolone1, A. Lacaita2, A. Spinelli2, A. Visconti1

1Micron Semiconductor Italy, 2Polytechnic of Milano

B4

11:35 Evaluating Analog Circuit Performance in Light of MOSFET Aging at Different Time Scales

H. Habal, H. Graeb

Technical University Munich

B5

11:45 Invited Paper: Process Variation-Tolerant 3D Microprocessor Design: An Efficient Architectural Solution

J. Kong1, S. Chung2

1Rice University, 2Korea University

Session C - Low Power

Thursday, 30/05/2013, 12:00 to 12:35

Room: Aula Volta

Chairman: Michael Han, Qualcomm

C1

12:00 Invited Paper: Challenges of Operating 3D Devices at Very Low Voltage

S. Banna

GlobalFoundries

C2

12:15 Optimization of a Voltage Sense Amplifier Operating in Ultra-Wide Voltage Range with Back Bias Design Techniques in 28-nm UTBB FD-SOI Technology

G. Moritz1, J. Noel2, B. Giraud1, A. Grover2, D. Turgis2

1CEA-LETI, 2STMicroelectronics

C3

12:25 A Capacitively Coupled Clock Distribution Network with Correction for Process Dependent Skew

D. Kishan, M. Baghini, D. Sharma

IIT Bombay

12:35 Lunch and Workshop Sessions A, B, C

13:35 Opening Remarks

Keynote Paper

Thursday, 30/05/2013, 13:50 to 14:35

Room: Aula Volta

Chairman: Marc Belleville, CEA-LETI

13:50 Complex Trade-Offs - Enablement of Moore and More than Moore

D. Wristers

GlobalFoundries

Session D - Advanced Transistors

Thursday, 30/05/2013, 14:35 to 15:15

Room: Aula Volta

Chairmen: Bich-Yen Nguyen, Soitec

Akif Sultan, GlobalFoundries

D1

14:35 Impacts of Single-Trap Induced Random Telegraph Noise on Si and Ge Nanowire FETs, 6T SRAM Cells and Logic Circuits

S. Yang, Y. Chen, M. Fan, P. Hu, P. Su, C. Chuang

National Chiao Tung University

D2

14:45 Effective Channel Length of MOSFET with Halo

K. Terada, K. Sanai, S. Matsuoka, K. Tsuji

Hiroshima City University

D3

14:55 Impact of Precursors Choice on Characteristics of PEALD SiN for Spacer Applications

D. Triyoso, K. Hempel, S. Ohsiek, J. Shu, J. Schaeffer, M. Lenski

GlobalFoundries

D4

15:05 Quantum Confinement Effect in Strained-Si(1-x)Ge(x) Double-Gate Tunnel Field-Effect Transistors

N. Chien1, C. Shih1, L. Vinh2, N. Kien1

1National Chi Nan University, 2Industrial University of Ho Chi Minh City

15:15 Coffee Break

Session E - Advanced Memory Devices

Thursday, 30/05/2013, 15:30 to 16:15

Room: Aula Volta

Chairman: Hideto Hidaka, Renesas

E1

15:30 Invited Paper: Status and Perspectives of Embedded Non-Volatile Memories

A. Maurelli

STMicroelectronics

E2

15:45 CBRAM-Based Compact Interconnect Switch for Non-Volatile Reconfigurable Logic Circuits

S. Onkaraiah1, M. Belleville1, M. Reyboz1, F. Clermidy1, E. Vianello1, J. Portal2, C. Muller2

1CEA-LETI, 2IM2NP

E3

15:55 A Compact Model of Hafnium-Oxide-Based Resistive Random Access Memory

F. Puglisi, P. Pavan, A. Padovani, L. Larcher

University of Modena and Reggio Emilia

E4

16:05 6T SRAM Performance and Power Gain Using Double-Gate MOS in 28-nm FDSOI Technology

V. Asthana, M. Kar, J. Jimenez, S. Haendler, P. Galy

STMicroelectronics

Session F - High Power

Thursday, 30/05/2013, 16:15 to 16:55

Room: Aula Volta

Chairman: Jan Ackaert, ON Semiconductor

F1

16:15 Impact of the Leadframe Profile on the Occurrence of Passivation Cracks of Plastic-Encapsulated Electronic Power Devices

J. Ackaert, A. Mallik, D. Vanderstraeten

ON Semiconductors

F2

16:25 High-Voltage Operational Amplifier and High-Voltage Transceiver Using 0.25-µm 60-V BCD Process for Battery Management Systems

C. Chen1, Y. Wu1, C. Juan2, C. Wang1

1National Sun Yat-Sen University, 2MIRDC

F3

16:35 Improved Deep Trench Isolation Breakdown Voltage for SmartMOS

T. Dao, T. Roggenbauer, G. Boyd

Freescale Semiconductor

F4

16:45 High-Voltage Integrated Class-B Amplifier for Ultrasound Transducers

D. Bianchi1, F. Quaglia1, A. Mazzanti2, F. Svelto2

1STMicroelectronics, 2University of Pavia

16:55 Workshop Sessions D, E, F

18:15 Visit to University Museum

20:00 Gala Dinner

08:30 Opening Remarks

Session G - Emerging Technology

Friday, 31/05/2013, 08:40 to 09:50

Room: Aula Volta

Chairman: Simon Deleonibus, LETI

G1

08:40 Invited Paper: Silicon-Based Quantum Computation

S. Simmons

Oxford University

G2

08:55 Dual-Gate Junction-Less FET-Detection for In-Plane Nano-Electro-Mechanical Resonators

F. Arab Hassani1, H. Mizuta1, 2, Y. Tsuchiya2, C. Dupré3, E. Ollier3, S. Bartsch4, A. Ionescu4

1Japan Advanced Institute of Science and Technology, 2University of Southampton, 3CEA-LETI, 4EPFL

G3

09:05 Automatic Trimming Procedure to Enhance the Accuracy of On-Chip Analog Pulse Generators

E. Covi, A. Cabrini, G. Torelli

University of Pavia

G4

09:15 Invited Paper: Analog-to-Digital Converters on Plastic Foils

S. Abdinia1, D. Raiteri1, S. Jacob2, R. Coppard2, P. van Lieshout3, G. Palmisano4, A. Scuderi5, A. van Roermund1, E. Cantatore1

1Eindhoven University of Technology, 2CEA-LIten, 3Polymer Vision, 4University of Catania, 5STMicroelectronics

G5

09:30 High-Swing Buffer for Programmable Resistive Memories

E. Covi, A. Cabrini, G. Torelli

University of Pavia

G6

09:40 Biosequences Analysis on Nano-Magnet Logic

J. Wang, M. Vacca, M. Graziano, M. Roch, M. Zamboni

Polytechnic of Torino

Session H - AMS

Friday, 31/05/2013, 09:50 to 10:55

Room: Aula Volta

Chairmen: Stefano DAmico,UniversityofSalento'

Serge Bardy, NXP

H1

09:50 Invited Paper: Towards Minimum Power Analog Filters

S. DAmico'1, M. De Matteis2, A. Baschirotto2

1University of Salento, 2University of Milano-Bicocca

H2

10:05 A 32-Channel 12-Bits Single-Slope A-to-D Converter for LHC Environment

M. De Matteis1, T. Vergine1, S. DAmico'2, K. Kloukinas3, A. Marchioro3, A. Baschirotto1, V. Chironi2

1University of Milano-Bicocca, 2University of Salento, 3CERN

H3

10:15 A 14-Bit Extended-Range Incremental -ADC Matlab-Model Based on 90-nm CMOS Technology

M. De Matteis1, D. Cavallo1, M. Ronchi2, E. Guidetti2, G. Leggeri3, A. Baschirotto1

1University of Milano-Bicocca, 2STMicroelectronics, 3Pegasus Microdesign

H4

10:25 A Low-Power CMOS 0.13 µm Charge-Sensitive Preamplifier for GEM Detectors

M. De Matteis1, A. Pezzotta1, A. Costantini1, S. DAmico'2, G. Gorini1, F. Murtas3, A. Baschirotto1

1University of Milano-Bicocca, 2University of Salento, 3INFN Frascati

H5

10:35 Design of High-Order Class-D Audio Amplifiers

D. Cartasegna1, P. Malcovati2, L. Crespi1, K. Lee1, A. Baschirotto3

1Conexant Systems, 2University of Pavia, 3University of Milano-Bicocca

H6

10:45 A 10-Bit, 10-MS/s, Low Power Cyclic ADC

W. Chen, C. Chen

National Chiao-Tung University

10:55 Coffee Break

Session I - RF

Friday, 31/05/2013, 11:10 to 12:20

Room: Aula Volta

Chairmen: Stefano DAmico,UniversityofSalento'

Serge Bardy, NXP

I1

11:10 A Reconfigurable Passive Mixer for Multi-Standard Receivers in 0.18- m CMOS

K. Bao, X. Fan, Z. Wang

Southeast University

I2

11:20 A 34- W 75-dB-Dynamic-Range CMOS Analog Front-End for Intelligent Tire Sensor Network

M. De Matteis1, T. Vergine1, M. Sabatini2, A. Baschirotto1

1University of Milano-Bicocca, 2Pirelli

I3

11:30 Breast Cancer Detection based on an UWB Imaging System: Receiver Design and Simulations

X. Guo, M. Casu, M. Graziano, M. Zamboni

Polytechnic of Torino

I4

11:40 A Dual-Band Balun LNA Resilent to 5-6 GHz WLAN Blockers for IR-UWB in 65-nm CMOS

V. Chironi1, S. DAmico'1, A. Baschirotto2, M. De Matteis2

1University of Salento, 2University of Milano-Bicocca

I5

11:50 Design and Modeling of Passive Mixer-First Receivers for Broadband Millimeter-Wave Applications

A. Moroni1, D. Manstretta2

1STMicroelectronics, 2University of Pavia

I6

12:00 Noise Optimization of a Broadband LNA for Tuner Applications

H. Gul, A. Simin

NXP Semiconductors

I7

12:10 Characterization and Modeling of Depletion-Type nMOS Transistors for RF Switches with Zero Power Consumption in On-State

C. Andrei, G. Imbert, A. Scarpa

NXP Semiconductors

12:20 Lunch and Workshop Sessions G, H, I

Session J - Reliability

Friday, 31/05/2013, 13:20 to 14:05

Room: Aula Volta

Chairman: Koji Eriguchi, Kyoto University

J1

13:20 Invited Paper: High-Speed and Highly Accurate Evaluation of Electrical Characteristics in MOSFETs

A. Teramoto, S. Sugawa, T. Ohmi

Tohoku University

J2

13:35 Atomistic Simulations of Plasma Process-Induced Si Substrate Damage -- Effects of Substrate Bias-Power Frequency

A. Matsuda, Y. Nakakubo, Y. Takao, K. Eriguchi, K. Ono

Kyoto University

J3

13:45 Improvement of Gate Disturb Degradation in SONOS FETs for Vth Mismatch Compensation in CMOS Analog Circuits

M. Suzuki, A. Kinoshita, Y. Mitani

Toshiba Corporation

J4

13:55 ESD Protection Using BiMOS Transistor in 100-GHz RF Application for Advanced CMOS Technology

P. Galy1, T. Lim1, J. Jimenez1, P. Benech2, J. Fournier2, D. Marin-Cudra1

1STMicroelectronics, 2IMEP-INPG

Session K - SoC/MPSoC/SIP

Friday, 31/05/2013, 14:05 to 14:50

Room: Aula Volta

Chairman: Dac Pham, Freescale

K1

14:05 Invited Paper: The DOME Embedded 64-Bit Microserver Demonstrator

R. Luijten, A. Doering

IBM Research Zurich

K2

14:20 A Fast CAM-Based Watermarking Extraction on FPGA

D. Le1, T. Cao2, K. Inoue3, C. Pham1

1University of Electro-Communications Tokyo, 2University of Science Ho Chi Minh City, 3Advanced Original Technologies

K3

14:30 I2C System-on-Chip for Bi-Dimensional Gas-Sensor Arrays Providing Extended Dynamic-Range A/D Conversion and Row Temperature Regulation

F. Conso1, M. Grassi1, C. De Berti1, P. Malcovati1, A. Baschirotto2

1University of Pavia, 2University of Milano-Bicocca

K4

14:40 Bidirectional Interconnect Design for Low Latency High Bandwidth NoC

R. Kumar, H. Deshpande, G. Choi, A. Sprintson, P. Gratz

Texas A&M University

14:50 Coffee Break

Session L - 3D Integration

Friday, 31/05/2013, 15:05 to 16:05

Room: Aula Volta

Chairman: Bich-Yen Nguyen, Soitec

L1

15:05 Improving Area and Reliability of Three-Dimensional ICs by Multiplexing Through-Silicon Vias

M. Said1, F. Mehdipour2, M. El-Sayed1

1Egypt-Japan University of Science and Technology, 2Kyushu University

L2

15:15 TSV Count Minimization and Thermal Analysis for 3D Tree-Based FPGA

V. Pangracious1, Z. Marrakchi2, H. Mehrez2

1University Pierre and Marie Curie, 2University Paris 6

L3

15:25 High-Density Capacitors for SiP and SoC Applications Based on Three-Dimensional Integrated Metal-Isolator-Metal Structures

W. Weinreich, M. Rudolph, J. Paul, J. Koch, S. Riedel, K. Seidel, K. Steidel, M. Gutsch, C. Hohle, V. Beyer

Fraunhofer IPMS-CNT

L4

15:35 Invited Paper: Smart Stacking? and Smart Cut? Technologies for Wafer-Level 3D Integration

M. Sadaka1, I. Radu1, C. Lagahe-Blanchard1, L. Di Cioccio2

1Soitec, 2CEA-LETI

L5

15:50 Invited Paper: Back-End 3D Integration of HfO2-Based RRAMs for Low-Voltage Advanced IC Digital Design

E. Vianello1, O. Thomas1, M. Harrand1, S. Onkaraiah1, T. Cabout1, B. Traoré1, T. Diokh2, H. Oucheikh1, L. Perniola1, G. Molas1, P. Blaise1, J. Nodin1, E. Jalaguier1, B. De Salvo1

1CEA-LETI, 2STMicroelectronics

16:05 Best Student Paper Award

16:15 Closing Remarks

16:25 Presentations of ICICDT 2014

16:35 Workshop Sessions J, K, L